DICDER首页 | 技术中心 | 博客专栏 | 设计项目 | 见图知意 | 电子期刊 | 超级链接 | 排行榜 | 论坛 |  
   
 
超级链接--硬件描述语言

  [ 内容简介 ]
  超级链接,链接众多的有用的链接。
若有更好的链接推荐请到:http://bbs.dicder.com/viewthread.php?tid=454。

Verilog
1. The Verilog Hardware Description Language, 5th Edition
http://www.eetop.com.cn/cgi-bin/ ... ic=3208&show=25


2. Prentice.Verilog.HDL.A.Guide.To.Digital.Design.And.Synthesis.2nd.Edition  
http://www.eetop.com.cn/cgi-bin/topic.cgi?forum=5&topic=3254


3. IEEE standard Verilog HDL
http://bbs.dicder.com/htm_data/40/0601/383.html


4. Verilog ref: http://www.sutherland-hdl.com/on ... /vlog_ref_body.html

5. NCVlog tool

6. File I/O in verilog: http://www.chris.spear.net/pli/fileio.htm

7. Guide: http://mufasa.informatik.uni-man ... is_with_verilog.pdf
8. Verilog 10 golden rules: http://www.bawankule.com/verilogcenter/files/10_1.pdf

9. State Encoding: http://www.sunburst-design.com/papers/CummingsSNUG1998SJ_FSM.pdf


Manuals/FAQ/References
- Gerard Blair's Verilog Manual
- Cadence Design Systems, Verilog-XL Reference Manual ( PDF version )
- Verilog Manual By Dr. Daniel C. Hyde from Bucknell University ( PDF version )
- Verilog Quick Reference at Carleton University-PDF
- Verilog Quick Reference by Stuart Sutherland -Author of Verilog PLI Handbook
- Verilog Quick Reference by Andy S. Tsay and Carolin Lin
- Verilog Educational Presentation by Donald Thomas-PDF -Author of The Verilog Hardware Description Language
- Verilog Reference by Xilinx-PDF
- Aldec Verilog/VHDL Interactive Tutorials (Windows Executable)
- Mabex Verilog/VHDL Interactive Tutorial Demo s (Windows Executable)
- Rajesh Bawankule's Verilog Center (Check out the FAQs)

- Comp.Lang.Verilog FAQ
- Verilog (Chapter 11 and Appendix B) from Michael John Sebastian Smith's online ASIC Book
- Verilog Instant Reference-PDF

Good Verilog Papers/Presentations
- Papers by Stuart Sutherland
- Papers by Clifford Cummins
University Links and Research
- Mike Gordon's Verilog site (Read the paper The Semantic Challenge of Verilog HDL here)
- Gerard Blair's Verilog and VLSI Links

Dedicated Verilog Sites
- Verilog.net
- Verilog.com

Art of Verification
- Project VeriPage by Swapnajit Mitra (PLI Tutorial/Links/FAQ) -Author of Principles of Verilog PLI - Chris Spear's Verilog/PLI site
- Janick Bergeron's Verification site -Moderator of Verification Guild & Author of Writing Testbenches-Functional Verification of HDL Models
- Verification Methodology Manual-Book Online
Scripts/Tools
- Verilog to HTML converter for code browsing and web posting
Other Users Verilog Links
- John Cooly's DeepChip website
- http://www.ece.ucdavis.edu/~jwwebb/
- http://bunniestudios.com/bunnie/links.html
- http://www.csd.uoc.gr/~simos/bookmarks.html
- http://www4.ncsu.edu/~vkreddy/links.htm
- http://www.inf.pucrs.br/~calazans/NCbookmarks.html

SystemVerilog
1 . SystemVerilog
http://www.project-veripage.com/sv_front.php


2. SystemVerilog 3.1a语言参考手册 (感谢alexwan提供)
http://www.fpgatech.net/onlinere ... stemverilog31a.html (一些工程师正在翻译中,一部分中文,一部分还是英文,想了结的可以看看)

3. http://www.asic-world.com/systemverilog/index.html (感谢xlzhang提供)

4. http://www.synopsys.com/SystemVerilog/ (感谢 liefenglan 提供)

5. SystemVerilog page
http://www.chris.spear.net/systemverilog/default.htm

6. Transaction level debug in SystemVerilog
http://www.soccentral.com/results.asp?CategoryID=488&EntryID=19547
    站长推荐
    分类阅读
电路基础 硬件语言
逻辑验证 电路综合
布局布线 可测设计
基本逻辑 制造工艺
书籍精选 说文解字
工具学习 数字滤波
趣闻逸事 数字锁相
设计杂项 低耗设计
    最新文章
    推荐文章
    热点文章
关于我们 | 版权声明 | 广告服务 | 联系我们 | 诚聘英才 | 友情链接 | 网站公告 | 留言本 | |
Copyright ©2005-2006 数字集成电路设计者. 保留所有权利. 本站点由5life制作维护 苏ICP备06005062号